Here are a number of exercises of differing levels.  You are
encouraged to think about them, or some of them, and be ready to
discuss a proposed solution. Some are real-world issues, some are just
related to the pll/kconfig lesson (lesson 07).

1- Let's imagine your client wants you to make a PCB with an ADC
device.  They want 12 bits of precision for an input range of 0-5V,
0-12V, 0-24V, selectable with some micro-switch of your choice (better
if if software driven).  Input impedance should be 10kohm.
Additionally, they want a current input: 0-20mA over 500 ohms
(precision is unspecified). How would you design your board?

2- Remember that putc, as currently implemented in out code base,
is suboptimal. I'm still waiting for suggestions about how to make
it better.

3- When things go bad we want to panic the system (i.e., hard lock).
At least, I want this, if you disagree let's discuss about it.  The
point is that if something goes wrong in lab, it should not get
unnoticed, and if something goes wrong when your client is testing
before deployment, they must be able to report you.  So, with your TDC
board, please design a panic API and describe the implementation.

4- In the TDC we have a 12MHz oscillator, and lib/pll.c relies on this.
But what about boards without an oscillator? The internal RC oscillator
is enough for many use cases: a PCB without oscillator saves real estate
and real money (say 0.5 EUR per board). How do you support this in
software?

5- Please add to the current code-base full support for Cortex-M3
processors (e.g.: LPC1347). Some of those microcontrollers have the
same footprint, so we can mount a TDC with them. Yes, I have one.

6- Support AVR (the Arduino family). Stuff is half-done already, with
the Kconfig infrastructure. Please describe how would you complete
such support in the current code base.

7- The default number of flash wait states is the maximum possible.
But if we run slower (e.g. at 12MHz, with PLL=1), we can configure the
flash for no wait states (the manual says we need 1 wait state every
20MHz of CPU speed).  Please suggest an implementation to optimize this.

8- Study the LPC UART and support 230400 baud (not "funny", but you
must be able to read the data sheet, besides, the code is almost there).

9- One of my TDC boards mounts a 10MHz VCXO. Currently the code requires
a 12MHz oscillator. Please describe the steps to support 10MHz.