W1: Electrical


A shared line has a dominant and a recessive state
Here, as usual, high is recessive and low is dominant
Both the master and the slave can pulse the line low

The signal line is also a power line
The slaves feature an internal capacitor and low consumption
But extra power may be needed during conversion
As a result you either need two wires in the device, or in the uC
The below figures are from the DS18B20 data sheet