ARM/Thumb interoperability


Since ARM7T, we have two possible operating modes
The "T" bit is part of the processor status register
To set (or clear) it we jump to an odd (even) address.
Bit 0 of the program counter is thus used as a selector

Not all instructions are available in Thumb mode
In particular, no special instruction to access banked registers
Also, interrupt (and (trap) management starts in ARM mode
This is needed for compatibility with existing code

The vast majority of UC developers chose Thumb
There is a little performance penalty, but that's ok
What is limited (and costly), in microcontrollers, is memory

As a matter of facts, this is what happened in the user base
The vast majority of code was built in Thumb mode
Only some OS procedures (and IRQ entry/exit) used ARM mode